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january 2015 docid3572 rev 4 1/17 AN390 application note avs kit guidelines introduction the ac line voltage around the world varies widely. power supply designers may overcome this problem by using a doubler / bridge switch to double the 120 v nominal ac line voltage, in case the application is plugged on 120 v ac mains. in case of operation on the 230 v ac line voltage, the doubler switch is non-active. thus, the input voltage of the application power supply after the rectifier bridge is always close to the peak line voltage of 230 v ac line whatever is the real line voltage. the avs kit is used to regulate the input voltage of power supplies which are mainly switched mode power supplies (smps). avs kit still allows emc standard compliance (inrush current limitation, conducted noise, noise immunity) as soon as a proper circuit is designed. avs8, avs10 and avs12 are automatic ac line voltage selectors used in full range switch mode power supply (smps). these automatic line voltage selectors are made of two devices, an integrated circuit (ic) and a customized triac. the triac automatically modifies the structure of the input diode bridge to keep the same dc voltage range thanks to the ic control. the purpose of this document is to describe the avs kit features and explain how to adapt the power supply to various nominal line voltages. this document also provides technical recommendations in terms of how to implement the avs kit in the application. www.st.com
doubler / bridge circuit principle AN390 2/17 docid3572 rev 4 1 doubler / bridge circuit principle ac line voltages over the world can be divided mainly into two categories: ? 100-120 v nominal rms voltage, 50 hz and/or 60 hz systems (for example for japan or usa). electronic equipment is usually designed to run in the 88 to 132 v range. ? 220-240 v nominal rms voltage, 50 hz and/ or 60 hz systems (for example for europe or south korea). equipment has to be designed to run in the 184 to 276 v range. the doubler / bridge circuit principle is shown in figure 1 . there are two modes according to the ac line voltage: ? doubler mode : when the ac input voltage is in the 100 to 120 v range, the switch s1 is closed. during the positiv e half cycle of the ac line voltage, the c1 capacitor is charged to the peak line voltage. during the negative half cycle of the ac line voltage, the c2 capacitor is also charged to the peak line voltage. the voltage across series association of c1 and c2 (v out ) is then equal approximately to twice the peak line voltage. ? bridge mode : when the line voltage is in the 220 to 240 v range, the switch s1 is open. c1 and c2 capacitors are simultaneously charged during each ac line half- cycle. v out is then around the peak line voltage thanks to the diode bridge. figure 1. doubler / bridge circuit principle c1 c2 s1 smps ac line v out
docid3572 rev 4 3/17 AN390 avs description 17 2 avs description 2.1 kit description the avs kit circuit replaces the traditional manual switch found in some appliance power supplies. this circuit eliminates smps failures incurred by inadvertently positioning the mechanical switch in the wrong position. this solution improves the power supply reliability with a reduced size and a low cost solution. the avs kit is composed of two devices: ? a triac specially designed for this application. this triac is called avs08cb or avs10cb oravs12cb in a to220 package. ? a controller (avs1acp08 or avs1bcp08) which senses the ac line voltage. this ic is optimized for low consumption and high security triggering of the triac. the ic controller is available in an 8 pin dips package. there are three avs kits each dedicated to a particular power range: ? avs08: used for smps < 200 w. avs08 is composed of an avs1bcp08 controller and an avs08cb triac. ? avs10: used for smps up to 300 w. avs10 is composed of an avs1acp08 controller and an avs10cb triac. ? avs12: used for smps up to 500 w. avs12 is composed of an avs1acp08 controller and an avs12cb triac. 2.2 avs implementation a typical application diagram for the avs is shown in figure 2 and figure 3 . figure 2 defines the application schematic with a dc resistive power supply (d1, r5, r6, c2) and figure 3 defines the application schematic with a capacitive power supply (d1, d2, r5, c2, c3). to reduce the standby power supply the capacitive power supply is preferred. component values used with the avs kit are defined in appendix a . appendix b defines the printed avs board. the ac switch automatically modifies the structure of the input diode bridge to keep the same dc voltage range. the avs is compatible with 50 and 60 hz mains frequency and operates on two mains voltage ranges: ? on range i (100 to 120 v rms): the ac line rms voltage can vary from 88 to 132 v and the triac remains on. the bridge operates as a voltage doubling circuit. ? on range ii (220 to 240 v rms): the ac line voltage varies from 184 to 276 v and the triac is off. the circuit operates as a full wave bridge.
avs description AN390 4/17 docid3572 rev 4 figure 2. avs kit implementation with a dc resistive power supply figure 3. avs kit implementation with a dc capacitive power supply t1 avs1acp08 vdd vss 8 3 75 4 1 2 r5 r1 r2 r3 r4 c1 c2 d1 vdd vg vm vss u1 6 nc r6 avsxx c bulk1 c bulk2 ac line drec r lim rg c lim d lim t2 drec drec drec auxilliary secondary winding resistive power supply t1 avs1acp08 vdd vss 8 3 75 4 1 2 r5 r1 r2 r3 r4 c3 c1 c2 d2 d1 vdd vg vm vss u1 6 nc avsxx c bulk1 c bulk2 ac line drec rlim rg c lim d lim t2 drec drec drec auxilliary secondary winding capacitive power supply
docid3572 rev 4 5/17 AN390 avs description 17 note t2, rg, r lim, c_ lim and d lim are components which define the inrush current limiter circuit. a non-sensitive t2 triac must be used to ensure a good dv/dt characteristic. r lim resistor is short circuited by the triac just after the power supply is started. this to limit the power losses of the power supply compare to the classical solution with ntc thermistor. 2.3 ic power supply the dc power supply of the avs can be implemented with a dc resistive or a capacitive power supply. the series circuit d 1 , r 5 , r 6 and c 2 define the dc resistive power supply (see figure 2 ). the series circuit d 1 , d 2 , r 5 , c 3 and c 2 define the dc capacitive power supply (see figure 3 ) . to reduce the standby power supply a dc capacitive power supply is preferred. pin 1 of the avs ic, v ss , is a shunt regulator that provides a -9 v (typ.) output. the structure of the supply regulator is a shunt regulator and its current must be lower than 30 ma. in order to have good behavior of the circuit against mains voltage spikes, pin 4 (v dd ) of the integrated circuit has to be connected directly with a1 of the triac. equation 1 and equation 2 define respectively r 5 and r 6 resistors value for the dc resistive power supply and c 3 capacitor value for the capacitive power supply. i ci is the average current supplied to the ic in doubler mode. as the triac gate current is pulsed the i ci is equal to 3 ma. equation 1 equation 2 equation 3 and equation 4 define the power dissipated respectively by the dc resistive and capacitive power supply without considering the losses through the diode and the avs ic voltage regulator. equation 3 equation 4 () ? ? = + ci min rms i v r r _ 6 5 2 () 2 5 2 _ 3 2 2 1 max ci min rms min r i v f c - ? ? ? ? = 2 ? () () 6 5 2 _ min max rms r_max r r v p + = () () () () 2 _ 3 2 5 2 _ 5 2 1 max max min max rms max c_max c f r v r p ? ? ? ? ? =
avs description AN390 6/17 docid3572 rev 4 where: ? f is the ac line frequency ? r 5 and r 6 are the supply resistors for the dc resistive power supply ? r 5 the inrush limiter for the dc capacitive power supply ? v rms_min the minimum rms ac line voltage ? c 2 the bulk capacitor ? c 3 the supply capacitor for the dc capacitive power supply table 1 gives the components value of the dc resistive and capacitive power supplies whatever the ac line voltage value. 2.4 avs block description figure 4 shows the block diagram of the avs ic. advantages of this avs integrated circuit are ease of circuit design, lower power dissipation, a smaller component count and additional safety features. figure 4. avs block diagram table 1. dc resistive and capacitor power supply components value dc power supply r5 r6 c2 c3 resistive 9.1 k at 5% 1 watt 9.1 k at 5% 1 watt 33 f at 16 v 10% not applicable capacitive 100 at 5% 2 watt not applicable 33 f at 16 v 10% 220 nf at 400v ac x2 supply peak voltage detector zero voltage crossing detection oscillator reset parasitic filter mr mains mode controller triggering time controller 1 4 8 2 7 5 6 3 vss vdd vm osc/in osc/out vg nc mode
docid3572 rev 4 7/17 AN390 avs description 17 2.4.1 parasitic filter the triac of the avs kit is a sensitive gate triac specified to remain off when subjected to dv/dt of 50 v/s. circuit layout is critical in preventing false dv/dt turn on of the triac. the ic of the avs kit circuit has a built in digital filter that suppresses the effect of all spikes of less than 200 s duration. 2.4.2 gate current pulses pin 5 drives the gate of the triac through a 390 resistor (5%). the gate current is made up of a pulse train that has a typical duration of around 23 s (45 khz 5%). the duty cycle of the pulses is typically 10%. resistor r3 and capacitor c1 set the oscillator frequency through pins 2 and 3. 2.4.3 avs start up the triac triggering is valid (on range i) after the validation of power on reset (charge of supply capacitor c) and a delay of 8 mains periods (see figure 5 ) to permit the charge of the bulk smps input capacitors (c1 and c2) and to ensure the ac line voltage is stable on range ii. figure 5. power on reset description equation 5 and equation 6 define the delay time between the power on and the triac triggering respectively with a resistive ( figure 2 ) and capacitive power supply ( figure 3 ). this time takes into account the time to dc power supply output reaches the power on reset activation voltage (v razht = 0.89 ? v reg ) of the ic control and the delay of 8 mains periods. equation 5 undetermined power on reset power off reset normal operation undetermined 0v 0v -2,7v -2,7v vrazht vrazlt vreg= vss- vdd () () () + ? + - ? ? + ? ? = f min iss_qc r r min vrms c r r vreg td sistive 8 2 _ 89 . 0 6 5 2_max 6 5 re
avs description AN390 8/17 docid3572 rev 4 equation 6 with: ? f the ac line frequency ? r 5 and r 6 the supply resistors for the dc resistive power supply ? r 5 the inrush limiter for the dc capacitive power supply ? v rms_min the minimum rms ac line voltage ? c 2 the bulk capacitor ? v reg the voltage regulated ? i ss_qc the quiescent supply current of the avs circuit = 0.7 ma with the component values define in appendix a or in table 1 , the delay time is around 250 ms for a dc resistive and a capacitive power supply in the worst case. 2.4.4 ac line voltage detection the triac control is implemented through a comparison of the ac line voltage (v m on pin 8) with an internal threshold voltage (v th ). when the ac mains voltage increases from range i to range ii the triac gate current is removed. the doubler circuit is turned off within one mains period (the triac can only turn off when its current reach zero). that means the delay between line voltage increase and doubler circuit turn-off can reach up to 16.7 ms or 20 ms respectively for 60 and 50 hz operations. equation 7 defines the condition on the voltage across the pin 8 of the ic control to remove the triac gate pulses (bridge mode). equation 8 defines the condition on the voltage across the pin 8 of the ic control to apply the triac gate pulses (doubler mode). equation 7 equation 8 with v th typ = 4.25 v and v h typ = 0.4 v when the mains voltage drops from range ii to range i there are two options according to the pin 7 level. typical timing diagrams for the two modes are given in figure 6 and figure 7 . () + - ? ? ? + ? ? = f iss_qc c r min vrms c vreg td capacitive 8 2 2 1 _ 89 . 0 2 3_min min 2 5_max 2_max th m v v> thres1 (v ) thres2 (v h th m v v v- < )
docid3572 rev 4 9/17 AN390 avs description 17 ? v mode (pin 7) = v dd : the triac triggering pulse is activated 8 ac line periods after the power on reset of the ic and if a low line voltage is sensed. if the ac line voltage changes from typically 110 v to 230 v, then the avs circuit turns the triac off. if the ac line voltage changes back from 230 v to 110 v, the avs ic controller waits 8 mains cycles before to turn the triac on (see figure 6 ). this is done to check if the ac line voltage is a stable 110 v value and that the voltage reduction is not a short voltage dip. ? v mode (pin 7) = v ss : the triac control remains locked to range ii until circuit reset. this means that if the device is turned into a bridge mode, it will remain in the bridge mode, even if the ac line voltage suddenly dips into the 110 v range (see figure 7 ). figure 6. timing diagram with v mode (pin 7) = v dd figure 7. timing diagram with v mode (pin 7) = v ss vac (nominal rms) vthres2 tdelay < 1 ac line cycle 8 ac line cycles < 1 ac line cycle ig time time triac off triac on triac off triac on triac off vthres1 100v 240v tdelay < 1 ac line cycle ig time triac off triac on triac off vac (nominal rms) vthres2 time vthres1 240v 100v
avs description AN390 10/17 docid3572 rev 4 the ac line voltage measurement is implemented through the detection of the ac line peak voltage. r 1 and r 2 resistor values are defined according equation 9 , equation 10 and equation 11 . equation 9 defines the condition for r 1 and r 2 resistors to limit the power dissipation and to improve the ac line voltage measurement. equation 9 equation 10 defines r1 and r2 resistors to switch from doubler operation to bridge operation (from range i to range ii). equation 10 where: ? v reg typ = -9 v ? v th typ = 4.25 v equation 11 defines r1 and r2 resistors to switch from bridge operation to doubler operation (from range ii to range i). equation 11 where: ? v reg typ = -9 v ? v th typ = 4.25 v ? v h typ = 0.4 v for rms voltage on range i (110 v) and ii (230 v) r 2 and r 1 resistor values are respectively 18 k ? and 1 m ? at 1%. < + < m r r k2 800 2 1 1 2 2 1 2 - ? - = th reg v v i range on voltage rms max r r ( ( 1 2 2 1 2 - - = th reg v v ii range on voltage rms max r r ? h v - ( (
docid3572 rev 4 11/17 AN390 thermal rating of triac 17 3 thermal rating of triac the knowledge of the maximum triac current it m and the current pulse width t p in the worst case conditions allows the definition of the triac power dissipation (see equation 12 and equation 13 ). where: ? it rms is the rms triac current ? v t0 the threshold voltage of the triac ? r t the on state of the triac ? f the ac line frequency. equation 12 with equation 13 equation 14 and equation 15 define the junction temperature of the triac according to the ambient to junction thermal resistance and case to junction thermal resistance. equation 14 equation 15 for example, figure 8 (left) gives losses p t versus it rms for this application dedicated for the avs10cb triac. figure 8 (right) allows the evaluation of the external heat sink r th versus p t and t amb when t j = 110 c for the same triac. these curves come from equation 10 , equation 11 , equation 12 and equation 13 . () () 2 4 m p t to m p t it f t r v it f t p ? ? ? + ? ? ? ? = f t it it p m rms ? ? = () t ac c j th c j p r t t ? = - - () t a c th amb c p r t t ? = - -
thermal rating of triac AN390 12/17 docid3572 rev 4 figure 8. avs thermal management for example, with an avs10cb triac, if t p = 2 ms and it rms = 5 a then the triac dissipated power p t = 3.8 w. if the maximum junction temperature is t j = 110 c and the maximum case temperature t c = 100 c with a heatsink thermal resistance r thc-a = 7.5 c/w then the maximum operating ambient temperature (t a ) could be 70 c. 110 100 90 80 ( ( c) w) t p case t 01 2345678 0 2 4 6 8 10 12 i t (rms) (a) t amb (c) 10 30 50 70 90 110 130 t t 8.3ms t = 1ms t = 2ms t = 3ms t = 8ms rth = 0.0 c/w 2.5 c/w 5.0 c/w 7.5 c/w (w) p t 0 2 4 6 8 10 12
docid3572 rev 4 13/17 AN390 conclusion 17 4 conclusion this paper describes an efficient way of implementing an automatic doubler/bridge circuit. the primary use of this circuit is in 75 w to 500 w smps. other innovative uses are possible. the main advantages of the avs solution are: ? high efficiency : losses are just 2 w vs. 5 to 10 w for discrete schemes. ? safety : uses digital spike suppression, hysteresis, validation of range, a failsafe mode and good control. ? space optimization : small supply resistor and good reliability. ? ease of use : eliminates errors when the line range has to be selected manually by the end user. ? available solutions for various power ranges: ? avs08 < 200 w ? avs10 up to 300 w ? avs12 up to 500 w
avs bill of material AN390 14/17 docid3572 rev 4 appendix a avs bill of material table 2. avs bill of material components qty reference observations supplier resistor 1 r1 1 k at 1% nd resistor 1 r2 18 m at 1% nd resistor 1 r3 91 k at 1% nd resistor 1 r4 390 at 5% nd resistor dc resistance power supply 1r5 9.1 k at 5%, 1 w nd capacitive power supply 100 at 5%, 2 wnd resistor dc resistance power supply 1r6 9.1 k at 5%, 1 w nd capacitive power supply not applicable nd capacitor 1 c1 100 pf at 5%, 16 v nd capacitor 1 c2 33 f at 10%, 16 v nd capacitor resistance power supply 0 c3 not applicable nd capacitive power supply 1 220 nf at 400v ac x2 nd diode 1 d1 1n4007 nd diode resistance power supply 0 d2 not applicable nd capacitive power supply 1d2 1n4007 nd triac 1 ic2 avs10cb / avs12cb st integrated circuit 1 ic1 avs1acp08 st
docid3572 rev 4 15/17 AN390 printed avs circuit with a resistive power supply 17 appendix b printed avs circu it with a resistive power supply figure 9. product pin outs figure 10. component layout figure 11. printed circuit layout (copper side) 1:1 scale 1 2 3 4 8 7 6 5 v ss osc/in osc/out v dd vm mode nc vg dip-8 (plastic) 1 4 8 5 ic1 v ss r1 r2 d1 r g k l n a2 r5 r4 r3 r6 + c2 c1 sw1 ic1 n a2 l r g k v ss 1 5
revision history AN390 16/17 docid3572 rev 4 5 revision history table 3. document revision history date revision changes october-1990 1 first issue. 10-may-2004 2 stylesheet update. no content change. 09-jun-2009 3 updated figure 1 , figure 10 , figure 11 , and table 1. reformatted to current standards. 09-jan-2015 4 added information on doubler/bridge circuit principle, ic power supply design, design and operation of the avs ic, and the thermal rating of the triac.added avs08.
docid3572 rev 4 17/17 AN390 17 important notice ? please read carefully stmicroelectronics nv and its subsidiaries (?st?) reserve the right to make changes, corrections, enhancements, modifications, and improvements to st products and/or to this document at any time without notice. purchasers should obtain the latest relevant in formation on st products before placing orders. st products are sold pursuant to st?s terms and conditions of sale in place at the time of o rder acknowledgement. purchasers are solely responsible for the choice, selection, and use of st products and st assumes no liability for application assistance or the design of purchasers? products. no license, express or implied, to any intellectual property right is granted by st herein. resale of st products with provisions different from the information set forth herein shall void any warranty granted by st for such product. st and the st logo are trademarks of st. all other product or service names are the property of their respective owners. information in this document supersedes and replaces information previously supplied in any prior versions of this document. ? 2015 stmicroelectronics ? all rights reserved

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